A Data Path Design Tool for Automatically Mapping Artificial Neural Networks on to FPGA-Based Systems

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dc.contributor.authorŞahin, İbrahim
dc.contributor.authorSarıtekin, Namık Kemal
dc.date.accessioned2020-04-30T22:38:39Z
dc.date.available2020-04-30T22:38:39Z
dc.date.issued2016
dc.departmentDÜ, Teknik Eğitim Fakültesi, Elektronik ve Bilgisayar Eğitimi Bölümüen_US
dc.descriptionsaritekin, namik kemal/0000-0002-0759-0598en_US
dc.descriptionWOS: 000382411900053en_US
dc.description.abstractArtificial Neural Networks (ANNs) are usually implemented as software running on general purpose computers. On the other hand, when software implementations do not provide sufficient performance, ANNs are implemented as hardware on FPGA based systems for performance enhancement. Mapping ANNs to FPGAs is a time consuming and error prune process. In this study, a novel data path design tool, ANNGEN, has been proposed to help automate mapping ANNs to FPGA based systems. ANNGEN accepts ANN definitions in a NetList form. First, it parses and analyzes given NetList. Second, it checks the availability of the neurons. If all the neurons required by the NetList are available in its neuron Library, ANGENN performs the design procedure and produces VHDL code for the given NetList. ANNGEN has been tested with several different test cases, and it is observed that it is able to successfully generate VHDL codes for given ANN NetLists. Our practice with ANNGEN has showed that it effectively shortens the time required for implementing ANNs on FPGAs. It also eliminates the need for expert people. Additionally, ANNGEN produces error free code; thus, the debugging stage is also eliminated.en_US
dc.identifier.doi10.5370/JEET.2016.11.5.1466en_US
dc.identifier.endpage1474en_US
dc.identifier.issn1975-0102
dc.identifier.issn2093-7423
dc.identifier.issue5en_US
dc.identifier.scopusqualityQ2en_US
dc.identifier.startpage1466en_US
dc.identifier.urihttps://doi.org/10.5370/JEET.2016.11.5.1466
dc.identifier.urihttps://hdl.handle.net/20.500.12684/2343
dc.identifier.volume11en_US
dc.identifier.wosWOS:000382411900053en_US
dc.identifier.wosqualityQ4en_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.language.isoenen_US
dc.publisherKorean Inst Electr Engen_US
dc.relation.ispartofJournal Of Electrical Engineering & Technologyen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.subjectArtificial Neural Networksen_US
dc.subjectDesign Automationen_US
dc.subjectField Programmable Gate Arraysen_US
dc.subjectSoftware Toolen_US
dc.titleA Data Path Design Tool for Automatically Mapping Artificial Neural Networks on to FPGA-Based Systemsen_US
dc.typeArticleen_US

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