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Öğe Frequency response investigations of multi-input multi-output nonlinear systems using automated symbolic harmonic balance method(Springer, 2010) Akgün, Devrim; Çankaya, İlyasThe frequency response characteristics of MIMO systems are investigated by using harmonic balance equations. For this purpose, the algorithm for the automatic generation of harmonic balance equations is extended to include MIMO systems. Then the method is applied to obtain the frequency response of an example model having two-input and two-output. Both the frequency response and its harmonics are validated by numerical solutions. The effect of input amplitude variations and phase differences of inputs on the frequency response are investigated. Direct computation of the resonance parameters depending on input amplitude and phase variations are also obtained for the example system.Öğe Design and Implementation of Neural Networks Neurons with RadBas, LogSig, and TanSig Activation Functions on FPGA(Kaunas Univ Technology, 2012) Şahin, İbrahim; Koyuncu, İsmailI. Sahin, I. Koyuncu. Design and Implementation of Neural Networks Neurons with RadBas, LogSig, and TanSig Activation Functions on FPGA // Electronics and Electrical Engineering. - Kaunas: Technologija, 2012. - No. 4(120). - P. 51-54. Artificial Neural Networks (ANNs) are utilized in several key areas such as prediction, classification, motor control, etc. When high performance is needed, FPGA realizations of the ANNs are preferred. In this study, we designed and implemented a total of 18 different FPGA-based neurons, 2, 4 and 6-input biased and non-biased with each having three different activation functions requiring the calculations of e(x). Our purpose was to show the possibility of implementing neural networks with exponential activation functions on current FPGAs and measure the performance of the neurons. The results showed that up to 10 neurons can fit in to the smallest Virtex-6 and the network can be clocked up to 405MHz. Ill. 6, bibl. 11, tabl. 2 (in English; abstracts in English and Lithuanian).Öğe Particle swarm optimization performance on special linear programming problems(Academic Journals, 2010) Erdoğmuş, PakizeLinear programming (LP) is one of the best known optimization problems solved generally with Simplex Method. Most of the real life problems have been modeled as LP. The solutions of some special LP problems exhibiting cycling have not been studied except for the classical methods. This study, aimed to solve some special LP problems, exhibit cycling with Particle Swarm Optimization (PSO) and to show PSO performance for these problems. So, some special problems taken from literature have been solved with PSO. Results taken from Genetic Algorithm (GA) and PSO have been compared with the reference. The results have shown that PSO performance is generally better than GA in view of optimality and solution time. And it is also proposed that cycling problems are used for testing the performance of new developed algorithms like Numerical Benchmark Functions.Öğe On the anomalous peak at low and moderate frequency C-V curves of Al/SiO2/p-Si structure at the forward bias region(Natl Inst Optoelectronics, 2009) Yücedağ, İbrahimThe low and moderate frequency capacitance-voltage (C-V) and conductance-voltage (G/omega-V) characteristics of the Al/SiO2/p-Si (MIS) structures were investigated by considering the effect of interface states (N-ss) and series resistance (R-s). Experimental results show that in the existence of R-s the forward bias C-V curves exhibit a peak at efficiently high bias region, and this peak positions shift toward lower bias voltage with decreasing frequency. In addition, the values of C and G/omega) of these structures increase with decreasing frequency. The doping densities of acceptor atoms (N-A) and barrier height (Phi(B)) obtained from the slope of the C-2 vs. V plot in the inversion region at each frequency. The values of N-A give a minimum at 0.7 kHz while the values of Phi(B) increase with increasing frequency. In addition, the values of R-s and N-ss calculated using Nicollian and Goetzberger and Hill-Coleman methods, respectively. It has been seen that the values of R-s and N-ss decrease with increasing frequency.Öğe Analysis of surface states and series resistance in Au/n-Si Schottky diodes with insulator layer using current-voltage and admittance-voltage characteristics(Pergamon-Elsevier Science Ltd, 2009) Altındal, Şemsettin; Yücedağ, İbrahim; Tataroğlu, AdemIn order to good interpret the experimentally observed Au/n-Si (metal-semiconductor) Schottky diodes with thin insulator layer (18 angstrom) parameters such as the zero-bias barrier height (Phi(bo)), ideality factor (n), series resistance (R-s) and surface states have been investigated using current-voltage (I-V), capacitance-frequency (C-f) and conductance-frequency (G-f) techniques. The forward and reverse bias I-V characteristics of Au/n-Si (MS) Schottky diode were measured at room temperature. In addition, C-f and G-f characteristics were measured in the frequency range of 1 kHz-1 MHz. The higher values of C and G at low frequencies were attributed to the insulator layer and surface states. Under intermediate forward bias, the semi-logarithmic Ln (I)-V plot shows a good linear region. From this region, the slope and the intercept of this plot on the current axis allow to determine the ideality factor (n). the zero-barrier height (Phi(bo)) and the saturation current (I-s) evaluated to 2.878, 0.652 and 3.61 x 10(-7) A, respectively. The diode shows non-ideal I-V behavior with ideality factor greater than unity. This behavior can be attributed to the interfacial insulator layer, the surface states, series resistance and the formation barrier inhomogeneity at metal-semiconductor interface. From the C-f and G-f characteristics, the energy distribution of surface states (N-ss) and their relaxation time (tau) have been determined in the energy range of (E-c-0.493E(v))-(E-c-0.610) eV taking into account the forward bias I-V data. The values of N-ss and tau change from 9.35 x 10(13) eV(-1) cm(-2) to 2.73 x 10(13) eV(-1) cm(-2) and 1.75 x 10(-5) s to 4.50 x 10(-4) s, respectively. (C) 2009 Elsevier Ltd. All rights reserved.Öğe A Data Path Design Tool for Automatically Mapping Artificial Neural Networks on to FPGA-Based Systems(Korean Inst Electr Eng, 2016) Şahin, İbrahim; Sarıtekin, Namık KemalArtificial Neural Networks (ANNs) are usually implemented as software running on general purpose computers. On the other hand, when software implementations do not provide sufficient performance, ANNs are implemented as hardware on FPGA based systems for performance enhancement. Mapping ANNs to FPGAs is a time consuming and error prune process. In this study, a novel data path design tool, ANNGEN, has been proposed to help automate mapping ANNs to FPGA based systems. ANNGEN accepts ANN definitions in a NetList form. First, it parses and analyzes given NetList. Second, it checks the availability of the neurons. If all the neurons required by the NetList are available in its neuron Library, ANGENN performs the design procedure and produces VHDL code for the given NetList. ANNGEN has been tested with several different test cases, and it is observed that it is able to successfully generate VHDL codes for given ANN NetLists. Our practice with ANNGEN has showed that it effectively shortens the time required for implementing ANNs on FPGAs. It also eliminates the need for expert people. Additionally, ANNGEN produces error free code; thus, the debugging stage is also eliminated.Öğe A 32-bit floating-point module design for 3D graphic transformations(Academic Journals, 2010) Şahin, İbrahimNowadays, in computer animations, tens of, even hundreds of animation objects are placed in a scene to form a typical animation scene and thousands of vertices are used to mathematically define each object in the scene. Applying three dimensional (3D) transformations to such scenes requires huge amount of CPU time. As a result, calculation of an animation scene could take a long time. Moreover, in the case of real time animations, it becomes almost impossible to calculate transformations on time. In this presented work, a 32-bit floating-point based hardware module was designed to speed-up 3D graphic transformations using field programmable gate array (FPGA) chips. The module was tested and functional verification of the module was done by comparing the results produced by the module to the results generated by general purpose computers (PCs) for the same set of input data. Module's data processing speed was compared to various PCs. The results showed that, 3D graphic transformations can be speeded-up by a factor (up to 11.47) employing the designed module.Öğe Doğrusal Olmayan Regresyon Parametrelerinin Sezgisel Yöntemlerle Tahmini(2017) Erdoğmuş, Pakize; Ekiz, SimgeGerçek dünyadaki deneysel olarak elde edilen veriler ve sinyallerin matematiksel modelleri her zaman kesin ve belirli değildir. Sinyal işlemede ve diğer deneysel çalışmalarda veriler için bir matematiksel model elde etmek ve bu matematiksel modelin parametrelerinin tahmini önemli bir konudur. Bu çalışmada üç farklı veri seti ve bu veri setleri için literatürde önerilen beş farklı modelin parametreleri doğrusal olmayan regresyon metodları ve sezgisel arama algoritmaları ile tespit edilmeye çalışılmıştır. Doğrusal olmayan regresyon metodlarının en büyük dezavantajı yakınsamalarının parametrelerin ilk tahminlerine bağlı olmasıdır. Oysa bu çalışmada kullanılan sezgisel algoritmaların en iyi sonuca yakınsamaları başlangıç değerlerinden bağımsızdır. Bu amaçla iki tür test yapılmıştır. Birinci testte veri setleri ve her veri seti için önerilen modellere gerçek değerlerine yakın ilk değerler atanmış ve modeller hem klasik hemde sezgisel algoritmalar ile optimize edilmeye çalışılmıştır. Sezgisel agoritmalardan Genetic Algoritma(GA) ve Parçacık Sürü Optimizasyonu(PSO) algoritmaları ile elde edilen sonuçlar, klasik algoritmalar ile karşılaştırılmıştır. Birinci testte hem klasik yöntemler hemde sezgisel yöntemler model parametrelerini tahmin etmişlerdir. İkinci testte ise modellerin ilk değerleri gerçek değerlerden uzak seçilmiştir. Bu testte sezgisel algoritmalar daha başarılı sonuçlar vermiştir. Doğrusal olmayan regresyon analizinde kullanılan klasik algoritma sonuçları gerçek parametre değerine tüm çözümlerde yakınsayamamıştır. Yapılan analizler sonucunda model parametrelerinin ik değerleri hakkında bir bilgi olmadığı durumlarda sezgisel yöntemlerin doğrusal olmayan regresyon analizinde iyi bir alternatif olacağı görülmüştürÖğe Yüzde tabanlı String Eşleme Problemi için yeni bir donanım modülü tasarımı(2016) Şahin, İbrahim; Temür, GünayBir verinin bir dizgi içerisinde veya bir gen yapısının bir DNA gen dizilimi içerisinde arama işleminin gerçekleştirilmesi için çeşitli algoritmalar kullanılmaktadır. Kullanılan bu algoritmalardan bazıları bize mutlak eşleşme olmadığı durumlarda olumsuz dönüt vermekte, bazıları ise "bunu mu arıyorsunuz" diye alternatifler sunmaktadır. Her iki algoritma da genel amaçlı PC'lerde saniyeler süren işlemler sonucunda bize dönüt verebilmektedir. Bu çalışmada bize hem mutlak eşleşmeyi hem de hedef dizgi içinde yüzdelik eşleşme oranlarının gerçekleştiği konumu veren FPGA çiplerine yönelik yüksek performanslı bir donanım modülü tasarlanmıştır. Geliştirilen modülün veri işleme hızı farklı PC'lerle karşılaştırılmış ve 2300 kata kadar daha hızlı arama gerçekleştirdiği karşılaştırma sonuçlarından elde edilen veriler ile doğrulanmıştır.Öğe A new module design for 3D graphic transformations using generated floating-point core units(Praise Worthy Prize S.r.l, 2011) Şahin, İbrahim; Koyuncu, İsmailA typical animation scene of a computer animation may include hundreds of mathematically defined objects. Applying Three Dimensional (3D) affine transformations to such scenes requires huge amount of CPU time. In this study, an improved hardware module was designed to speed-up 3D graphic transformations using FPGA (Field Programmable Gate Array) chips. In the module design, for multiplication and addition operations, 32-bit multipliers and adders formed on FPGA fabric by IP CORE Generator tool were utilized. The module was tested and functionally verified. Module's data processing speed was compared to various PCs and to our previous module design. Results showed that, 3D graphic transformations can be speeded-up by factor of up to 40 times using the designed module compared to the PCs. Employing multipliers and adders formed with Xilinx's IP CORE Generator in the module design provided 1.4 times performance gain over our previous module design. © 2011 Praise Worthy Prize S.r.l. - All rights reserved.
