PENTACENE-BASED ORGANIC THIN FILM TRANSISTOR WITH SiO2 GATE DIELECTRIC
dc.contributor.author | Demir, Ahmet | |
dc.contributor.author | Bağcı, Sadık | |
dc.contributor.author | San, Sait Eren | |
dc.contributor.author | Doğruyol, Zekeriya | |
dc.date.accessioned | 2020-04-30T23:20:40Z | |
dc.date.available | 2020-04-30T23:20:40Z | |
dc.date.issued | 2015 | |
dc.department | DÜ, Fen-Edebiyat Fakültesi, Fizik Bölümü | en_US |
dc.description | WOS: 000354413700006 | en_US |
dc.description.abstract | An organic thin film transistor (OTFT) based on pentacene was fabricated with SiO2 as the gate dielectric material. We have investigated the effects of the thickness of pentacene layer and the organic semiconductor (OSC) material on OTFT devices at two different thicknesses. Au metal was deposited for gate, source and drain contacts of the device by using thermal evaporation method. Pentacene thin film layer was also prepared with thermal evaporation. Our study has shown that the change in pentacene thickness makes a noteworthy difference on the field effect mobility (mu(FET)), values, threshold voltages (V-T) and on/off current ratios (I-on/I-off). OTFTs exhibited saturation at the order of mu(FET) of 3.92 cm(2)/Vs and 0.86 cm(2)/Vs at different thicknesses. I-on/I-off and V-T are also thickness dependent. I-on/I-off is 1 x 10(3), 2 x 10(2) and V-T is 15 V, 27 V of 40 nm and 60 nm, respectively. The optimized thickness of the pentacene layer was found as 40 nm. The effect of the OSC layer thickness on the OTFT performance was found to be conspicuous. | en_US |
dc.description.sponsorship | Sakarya University Research Project UnitSakarya University [2013-02-02-009]; Duzce University Research Project UnitDuzce University [2013.05.02.195] | en_US |
dc.description.sponsorship | This work has been supported financially by Sakarya University Research Project Unit under project No. 2013-02-02-009, and Duzce University Research Project Unit under project No. 2013.05.02.195. Authors thank Prof. Salih Okur for his support with his facilities during Pentacene deposition. | en_US |
dc.identifier.doi | 10.1142/S0218625X15500389 | en_US |
dc.identifier.issn | 0218-625X | |
dc.identifier.issn | 1793-6667 | |
dc.identifier.issue | 3 | en_US |
dc.identifier.scopusquality | Q3 | en_US |
dc.identifier.uri | https://doi.org/10.1142/S0218625X15500389 | |
dc.identifier.uri | https://hdl.handle.net/20.500.12684/4053 | |
dc.identifier.volume | 22 | en_US |
dc.identifier.wos | WOS:000354413700006 | en_US |
dc.identifier.wosquality | Q4 | en_US |
dc.indekslendigikaynak | Web of Science | en_US |
dc.indekslendigikaynak | Scopus | en_US |
dc.language.iso | en | en_US |
dc.publisher | World Scientific Publ Co Pte Ltd | en_US |
dc.relation.ispartof | Surface Review And Letters | en_US |
dc.relation.publicationcategory | Makale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanı | en_US |
dc.rights | info:eu-repo/semantics/closedAccess | en_US |
dc.subject | OTFT | en_US |
dc.subject | pentacene | en_US |
dc.subject | SiO2 | en_US |
dc.subject | thickness | en_US |
dc.subject | mobility | en_US |
dc.title | PENTACENE-BASED ORGANIC THIN FILM TRANSISTOR WITH SiO2 GATE DIELECTRIC | en_US |
dc.type | Article | en_US |
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