Hardware design and implementation of a novel ANN-based chaotic generator in FPGA

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dc.contributor.authorAlçın, Murat
dc.contributor.authorPehlivan, İhsan
dc.contributor.authorKoyuncu, İsmail
dc.date.accessioned2020-05-01T12:10:17Z
dc.date.available2020-05-01T12:10:17Z
dc.date.issued2016
dc.departmentDÜ, Düzce Meslek Yüksekokulu, Elektronik ve Otomasyon Bölümüen_US
dc.descriptionWOS: 000376810000061en_US
dc.description.abstractThis paper presents a novel hardware implementation of Artificial Neural Networks (ANNs) for modeling of the Pehlivan-Uyaroglu Chaotic System (PUCS) on Field Programmable Gate Array (FPGA). There are two main parts in the proposed work. In the first part, a 3-8-3 Feed Forward Neural Network (FFNN) has been created using Matlab R2015a. The training results show that FFNN trained with back propagation algorithm exhibits satisfactory precision for the direct implementation. In the second part, the hardware implementation of the trained network has been carried out. The designed architecture is presented using Very High Speed Integrated Circuits Hardware Description Language (VHDL) and is implemented on a Xilinx Virtex 6 (XC6VCX240T) chip. All related parameters are defined with IEEE 754 single precision floating point number format. For the approximation of Log-Sigmoid transfer function, Xilinx's COordinate Rotation Digital Computer (CORDIC) design has been employed. The design can be used with a clock frequency up to 266.429 MHz. Finally, chip statistics of FPGA and analysis results have been presented. The proposed work have showed that chaotic systems can be successfully modeled using ANNs on FPGA. In future, chaos-based engineering applications can be performed using ANN-based chaotic oscillators on FPGA. (C) 2016 Elsevier GmbH. All rights reserved.en_US
dc.description.sponsorshipSakarya University Scientific Research Projects Commission PresidencySakarya University [2015-50-02-027]en_US
dc.description.sponsorshipWe would like to express our appreciation to the anonymous reviewers for their insightful comments, which have greatly improved the quality of the paper. This work was supported by the Sakarya University Scientific Research Projects Commission Presidency (No. 2015-50-02-027).en_US
dc.identifier.doi10.1016/j.ijleo.2016.03.042en_US
dc.identifier.endpage5505en_US
dc.identifier.issn0030-4026
dc.identifier.issue13en_US
dc.identifier.scopusqualityQ2en_US
dc.identifier.startpage5500en_US
dc.identifier.urihttps://doi.org/10.1016/j.ijleo.2016.03.042
dc.identifier.urihttps://hdl.handle.net/20.500.12684/6124
dc.identifier.volume127en_US
dc.identifier.wosWOS:000376810000061en_US
dc.identifier.wosqualityQ4en_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.language.isoenen_US
dc.publisherElsevier Gmbhen_US
dc.relation.ispartofOptiken_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/closedAccessen_US
dc.subjectArtificial Neural Networksen_US
dc.subjectVHDLen_US
dc.subjectField Programmable Gate Arraysen_US
dc.subjectChaotic systemsen_US
dc.titleHardware design and implementation of a novel ANN-based chaotic generator in FPGAen_US
dc.typeArticleen_US

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