Real Time Implementation of A Novel Chaotic Generator on FPGA

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Date

2015

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Ieee

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info:eu-repo/semantics/closedAccess

Abstract

In this study, a new continuous-time autonomous chaotic system has been presented and implemented on FPGA. Presented a new chaotic system has been designed using the IEEE 754-1985 floating-point format and implemented using Heun algorithm with VHDL language. The designed system has been synthesized and tested on Xilinx Virtex-6 FPGA chip. According to the test results, operation frequency of the FPGA-based a new chaotic signal generator is certain as 390 MHz and performance results have been given with chip statistics. In addition, the results obtained from FPGA-based new chaotic generator have been compared with the Matlab-based numerical results and it has been observed that obtained results are successful. By the developed FPGA-based novel chaotic system model, chaos-based various engineering applications such as true random number generation and secure communication system can be performed.

Description

23nd Signal Processing and Communications Applications Conference (SIU) -- MAY 16-19, 2015 -- Inonu Univ, Malatya, TURKEY
Tuna, Murat/0000-0003-3511-1336; FIDAN, CAN BULENT/0000-0001-5252-6301
WOS: 000380500900154

Keywords

Chaos, Chaotic systems, Heun, FPGA, VHDL

Journal or Series

2015 23Rd Signal Processing And Communications Applications Conference (Siu)

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N/A

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