Eroglu, Ayse GulYildirim, MertDurmus, PerihanDokme, Ibilge2021-12-012021-12-0120200021-89951097-4628https://doi.org/10.1002/app.48399https://hdl.handle.net/20.500.12684/10435This study presents voltage-dependent profile of interface traps in Au/n-Si structure with 2% graphene-cobalt-doped Ca3Co4Ga0.001Ox interfacial layer. Admittance measurements revealed capacitance-voltage (C-V) plots with typical regions of a metal-insulator-semiconductor structure through inversion, depletion, and accumulation regions. Frequency dispersion is observed in C-V plots and such behavior was explained with excess capacitance, which is associated with the density of interface traps (D-it) in the structure because larger D-it is observed when the measurements are held at low frequencies due to the fact that traps can follow the signal depending on their lifetime. D-it was also obtained using conductance method, which also provided lifetime of the traps. The difference between the values of D-it was attributed to the difference in extraction methods. Obtained results showed that Au/2% graphene-cobalt-doped Ca3Co4Ga0.001Ox/n-Si structure yields promising electrical characteristics when the structure is operated at high frequencies. (c) 2019 Wiley Periodicals, Inc. J. Appl. Polym. Sci. 2019, 136, 48399.en10.1002/app.48399info:eu-repo/semantics/closedAccessdensity of interface trapsdepletion capacitancegrapheneparallel conductanceAdmittance CharacteristicsElectrical-PropertiesVoltage-DependenceFrequencyDiodesDistribution of interface traps in Au/2% GC-doped Ca3Co4Ga0.001Ox/n-Si structuresArticle13782-s2.0-85070761155WOS:000481380100001Q2Q2Q2